1. Field of the Invention
The present invention relates to a semiconductor memory device having a compression test mode.
2. Description of the Related Art
Semiconductor memory devices are widely used in many electronic products and computer systems to store and retrieve data. Semiconductor memory devices have a variety of types, such as a random access memory (RAM), dynamic random access memory (DRAM), Synchronous DRAM (SDRAM), or a static RAM (SRAM).
Presently, semiconductor memory devices have become highly integrated. More than tens of millions of memory cells are integrated into a single semiconductor memory device so that much more data can be stored. During fabrication of the memory devices, the individual memory cells need to be tested. As the integration density of the memory devices increases, the test time taken to determine pass/fail of whole memory cells also increases.
One technique that is usually used to reduce test time is a compression test method. The compression test method is to compress data stored in a plurality of memory cells. Data read from the plurality of memory cells in each bank are compressed into some particular data bits or a single data bit by a data compression circuit included in the memory device. In a write operation of the data compression test, a tester provides identical data to the multiple memory banks through a communication channel. Then the data are read out from each bank and compressed by the compression circuit. Thereafter, the compress-data of the banks is output to the tester through the communication channel. In this manner, the tester can determine a pass or a fail of the memory device based on the compress-data and determine how to repair the fail bits, if necessary.
In the read operation of the conventional data compression test, all of the banks in the memory device are simultaneously activated. Therefore, the peak current required by the memory device is large and interference noise is introduced into the memory device accordingly. In addition, the compress-data of all of the banks is output to the communication channel at one time. Thus, it is difficult to determine whether a specific memory bank is normal or defective, such that the repair of a specific memory bank is impossible to implement.
Therefore, there is need to improve the data compression test on a semiconductor memory device.